Senior Design Verification Engineer

Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution.
Flat structure, highly impactful technology and excellent benefits.
Senior Verification Engineer Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners.
Define and implement detailed verification strategies and architectures to ensure product quality and performance.
Manage functional and code coverage metrics to track and report progress.
Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests.
Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies.
A solid understanding of mixed hardware/software verification approaches.
Experience with RISC-V architectures is preferred.
Proven ability to work effectively with design teams and external partners to achieve project goals.
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