Low Latency Java Engineer

Details of the offer

Tyler Capital is proprietary trading firm with a rich history spanning over 20 years.
We are a systematic algorithmic trading firm, trading futures on the CME, Eurex, ICE and TMX.
We are a small team with an open, collaborative culture where all members of the team have access to all parts of the code.
Tyler Capital uses its own technology for almost everything it does.
This enables us to deeply understand the financial markets, our actions in them, and leverage the skills of our interdisciplinary team to improve and grow our business.
Our technology is primary Java, with some carefully crafted C++ where it's needed (for performance reasons).
We also make heavy use of Python for data analysis.
We are looking for an Engineer to focus on reducing the latency of our algorithmic trading system.
This engineer will work closely with our technology, infrastructure and research teams and make changes across our entire stack.
Your key responsibilities will include: Working with the wider technology team to understand how our trading system operates to instrument, measure and report on our performance.
Identify key bottlenecks and performance regressions in our system.
Recommend and make changes to our software, operating system settings and hardware environment to improve performance and drive down the latency of our trading.
Work with quantitative researchers to find and implement alternative methods of calculating key signals that are more sympathetic to modern hardware.
Skills and Experience: At least 5 years of professional programming experience with some exposure to low-latency, high frequency trading.
Deep understanding of how a modern computer works and ability to read x86-64 assembly.
Understanding of cache friendly data structures, lock free algorithms, the AVX instruction set and associated compiler intrinsics.
Competent in both Java and C++ and expert in at least one of these.
Understanding of modern networking and kernel bypass stacks: TCPDirect, ef_vi, layer one / cut through switches Appreciation of Linux and BIOS tuning to optimise for minimal latency and jitter.
An interest in compiler design and implementation.
Beneficial: experience working on a system where some functionality has been offloaded to an FPGA accelerator.
Personal Attributes: Passion for making things go faster High energy, motivation, and a proactive approach to challenges and problem-solving.
Excellent communication skills and ability to explain technical concepts.
Ability to form strong working relationships within the team.
Entrepreneurial spirit and a commitment to excellence.
Strong organizational skills and a disciplined approach to managing multiple streams of work.
Dedication to continuous learning and professional development.
Applicants must have the right to work in the UK.


Nominal Salary: To be agreed

Source: Talent_Dynamic-Ppc

Requirements

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